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exchain
nebula
Commits
4382da4d
Commit
4382da4d
authored
Oct 04, 2021
by
George Hotz
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85k ops/sec
parent
03276b42
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49 additions
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53 deletions
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-53
MIPS.sol
contracts/MIPS.sol
+49
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contracts/MIPS.sol
View file @
4382da4d
...
@@ -66,13 +66,6 @@ contract MIPS {
...
@@ -66,13 +66,6 @@ contract MIPS {
uint256 signed = ((1 << (32-idx)) - 1) << idx;
uint256 signed = ((1 << (32-idx)) - 1) << idx;
uint256 mask = (1 << idx) - 1;
uint256 mask = (1 << idx) - 1;
return uint32(dat&mask | (isSigned ? signed : 0));
return uint32(dat&mask | (isSigned ? signed : 0));
/*if (idx == 16) {
return dat&0xFFFF | (dat&0x8000 != 0 ? 0xFFFF0000 : 0);
} else if (idx == 8) {
return dat&0xFF | (dat&0x80 != 0 ? 0xFFFFFF00 : 0);
}
return dat;*/
}
}
// will revert if any required input state is missing
// will revert if any required input state is missing
...
@@ -209,21 +202,21 @@ contract MIPS {
...
@@ -209,21 +202,21 @@ contract MIPS {
// jumps (with branch delay slot)
// jumps (with branch delay slot)
// nothing is written to the state by this time
// nothing is written to the state by this time
if (opcode == 0) {
if (opcode == 0 && (func == 8 || func == 9)
) {
if (func == 8 || func == 9
) {
// jr/jalr (val is already right)
// jr/jalr (val is already right)
return stepNextPC(stateHash, uint32(nextPC), val | (func == 9 ? STORE_LINK : 0));
return stepNextPC(stateHash, uint32(nextPC), val | (func == 9 ? STORE_LINK : 0));
}
}
// syscall (can read and write)
// syscall (can read and write)
if (opcode == 0 &&
func == 0xC) {
if (
func == 0xC) {
//revert("unhandled syscall");
//revert("unhandled syscall");
stateHash = handleSyscall(stateHash);
stateHash = handleSyscall(stateHash);
}
}
// lo and hi registers
// lo and hi registers
// can write back
// can write back
if (opcode == 0
) {
if (func >= 0x10 && func < 0x1c
) {
if (func == 0x10) val = ReadMemory(stateHash, REG_HI); // mfhi
if (func == 0x10) val = ReadMemory(stateHash, REG_HI); // mfhi
else if (func == 0x11) storeAddr = REG_HI; // mthi
else if (func == 0x11) storeAddr = REG_HI; // mthi
else if (func == 0x12) val = ReadMemory(stateHash, REG_LO); // mflo
else if (func == 0x12) val = ReadMemory(stateHash, REG_LO); // mflo
...
@@ -253,6 +246,7 @@ contract MIPS {
...
@@ -253,6 +246,7 @@ contract MIPS {
storeAddr = REG_LO;
storeAddr = REG_LO;
}
}
}
}
}
// stupid sc, write a 1 to rt
// stupid sc, write a 1 to rt
if (opcode == 0x38) {
if (opcode == 0x38) {
...
@@ -280,6 +274,7 @@ contract MIPS {
...
@@ -280,6 +274,7 @@ contract MIPS {
// transform ArithLogI
// transform ArithLogI
// TODO: replace with table
// TODO: replace with table
if (opcode >= 8 && opcode < 0xF) {
if (opcode == 8) { opcode = 0; func = 0x20; } // addi
if (opcode == 8) { opcode = 0; func = 0x20; } // addi
else if (opcode == 9) { opcode = 0; func = 0x21; } // addiu
else if (opcode == 9) { opcode = 0; func = 0x21; } // addiu
else if (opcode == 0xa) { opcode = 0; func = 0x2a; } // slti
else if (opcode == 0xa) { opcode = 0; func = 0x2a; } // slti
...
@@ -287,6 +282,7 @@ contract MIPS {
...
@@ -287,6 +282,7 @@ contract MIPS {
else if (opcode == 0xc) { opcode = 0; func = 0x24; } // andi
else if (opcode == 0xc) { opcode = 0; func = 0x24; } // andi
else if (opcode == 0xd) { opcode = 0; func = 0x25; } // ori
else if (opcode == 0xd) { opcode = 0; func = 0x25; } // ori
else if (opcode == 0xe) { opcode = 0; func = 0x26; } // xori
else if (opcode == 0xe) { opcode = 0; func = 0x26; } // xori
}
// 0 is opcode SPECIAL
// 0 is opcode SPECIAL
if (opcode == 0) {
if (opcode == 0) {
...
...
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