111khz

contracts/MIPS.sol

@@ -211,9 +211,6 @@ contract MIPS {
     // ALU
     uint32 val = execute(insn, rs, rt, mem);
 
-    // jumps (with branch delay slot)
-    // nothing is written to the state by this time
-
     if (opcode == 0 && func >= 8 && func < 0x1c) {
       if (func == 8 || func == 9) {
         // jr/jalr
@@ -260,7 +257,6 @@ contract MIPS {
         }
 
         // lo/hi writeback
-        // can't stepNextPC after this
         if (func >= 0x18 && func < 0x1c) {
           stateHash = WriteMemory(stateHash, REG_HI, hi);
           storeAddr = REG_LO;
@@ -288,6 +284,7 @@ contract MIPS {
     uint32 func = insn & 0x3f; // 6-bits
     // TODO: deref the immed into a register
 
+    if (opcode < 0x20) {
       // transform ArithLogI
       // TODO: replace with table
       if (opcode >= 8 && opcode < 0xF) {
@@ -335,7 +332,9 @@ contract MIPS {
           if (func == 0x20) rs = ~rs;
           uint32 i = 0; while (rs&0x80000000 != 0) { i++; rs <<= 1; } return i;
         }
-    } else if (opcode == 0x20) {  // lb
+      }
+    } else if (opcode < 0x28) {
+      if (opcode == 0x20) {  // lb
         return SE((mem >> (24-(rs&3)*8)) & 0xFF, 8);
       } else if (opcode == 0x21) {  // lh
         return SE((mem >> (16-(rs&2)*8)) & 0xFFFF, 16);
@@ -343,7 +342,7 @@ contract MIPS {
         uint32 val = mem << ((rs&3)*8);
         uint32 mask = uint32(0xFFFFFFFF) << ((rs&3)*8);
         return (rt & ~mask) | val;
-    } else if (opcode == 0x23 || opcode == 0x30) { return mem;   // lw (or ll)
+      } else if (opcode == 0x23) { return mem;   // lw
       } else if (opcode == 0x24) {  // lbu
         return (mem >> (24-(rs&3)*8)) & 0xFF;
       } else if (opcode == 0x25) {  // lhu
@@ -352,6 +351,7 @@ contract MIPS {
         uint32 val = mem >> (24-(rs&3)*8);
         uint32 mask = uint32(0xFFFFFFFF) >> (24-(rs&3)*8);
         return (rt & ~mask) | val;
+      }
     } else if (opcode == 0x28) { // sb
       uint32 val = (rt&0xFF) << (24-(rs&3)*8);
       uint32 mask = 0xFFFFFFFF ^ uint32(0xFF << (24-(rs&3)*8));
@@ -364,13 +364,16 @@ contract MIPS {
       uint32 val = rt >> ((rs&3)*8);
       uint32 mask = uint32(0xFFFFFFFF) >> ((rs&3)*8);
       return (mem & ~mask) | val;
-    } else if (opcode == 0x2b || opcode == 0x38) { // sw (or sc, not right?)
+    } else if (opcode == 0x2b) { // sw
       return rt;
     } else if (opcode == 0x2e) {  // swr
       uint32 val = rt << (24-(rs&3)*8);
       uint32 mask = uint32(0xFFFFFFFF) << (24-(rs&3)*8);
       return (mem & ~mask) | val;
+    } else if (opcode == 0x30) { return mem; // ll
+    } else if (opcode == 0x38) { return rt; // sc
     }
+
     revert("invalid instruction");
   }
 }