Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Submit feedback
Contribute to GitLab
Sign in
Toggle navigation
N
nebula
Project
Project
Details
Activity
Releases
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Charts
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
exchain
nebula
Commits
ac204c7e
Commit
ac204c7e
authored
Sep 26, 2021
by
George Hotz
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
wow, preimage oracle was so easy to write
parent
0154de17
Changes
2
Hide whitespace changes
Inline
Side-by-side
Showing
2 changed files
with
21 additions
and
3 deletions
+21
-3
MIPS.sol
contracts/MIPS.sol
+21
-2
run.py
risc/run.py
+0
-1
No files found.
contracts/MIPS.sol
View file @
ac204c7e
...
@@ -43,11 +43,30 @@ contract MIPS {
...
@@ -43,11 +43,30 @@ contract MIPS {
}
}
function ReadMemory(bytes32 stateHash, uint32 addr) public view returns (uint32) {
function ReadMemory(bytes32 stateHash, uint32 addr) public view returns (uint32) {
require(addr & 3 == 0, "read memory must be 32-bit aligned");
// zero register is always 0
if (addr == REG_OFFSET) {
if (addr == REG_OFFSET) {
// zero register is always 0
return 0;
return 0;
}
}
require(addr & 3 == 0, "read memory must be 32-bit aligned");
// MMIO preimage oracle
if (addr >= 0x31000000 && addr < 0x32000000) {
bytes32 pihash = ReadBytes32(stateHash, 0x30001000);
if (addr == 0x31000000) {
return uint32(preimage[pihash].length);
}
uint offset = addr-0x31000004;
uint8 a0 = uint8(preimage[pihash][offset]);
uint8 a1 = uint8(preimage[pihash][offset+1]);
uint8 a2 = uint8(preimage[pihash][offset+2]);
uint8 a3 = uint8(preimage[pihash][offset+3]);
return (uint32(a0) << 24) |
(uint32(a1) << 16) |
(uint32(a2) << 8) |
(uint32(a3) << 0);
}
uint64 ret = state[stateHash][addr];
uint64 ret = state[stateHash][addr];
require((ret >> 32) == 1, "memory was not initialized");
require((ret >> 32) == 1, "memory was not initialized");
return uint32(ret);
return uint32(ret);
...
...
risc/run.py
View file @
ac204c7e
...
@@ -30,7 +30,6 @@ heap_start = 0x20000000 # 0x20000000-0x30000000
...
@@ -30,7 +30,6 @@ heap_start = 0x20000000 # 0x20000000-0x30000000
# output oracle @ 0x30000800
# output oracle @ 0x30000800
# preimage oracle (write) @ 0x30001000
# preimage oracle (write) @ 0x30001000
# preimage oracle (read) @ 0x31000000-0x32000000 (16 MB)
# preimage oracle (read) @ 0x31000000-0x32000000 (16 MB)
# preimage oracle (trigger) @ 0x32000000 (returns size)
brk_start
=
0x40000000
# 0x40000000-0x80000000
brk_start
=
0x40000000
# 0x40000000-0x80000000
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment