Commit d64d43f3 authored by George Hotz's avatar George Hotz

jalr

parent 428f6716
...@@ -25,6 +25,7 @@ contract MIPS { ...@@ -25,6 +25,7 @@ contract MIPS {
uint32 constant public REG_OFFSET = 0xc0000000; uint32 constant public REG_OFFSET = 0xc0000000;
uint32 constant public REG_ZERO = REG_OFFSET; uint32 constant public REG_ZERO = REG_OFFSET;
uint32 constant public REG_LR = REG_OFFSET + 0x1f*4;
uint32 constant public REG_PC = REG_OFFSET + 0x20*4; uint32 constant public REG_PC = REG_OFFSET + 0x20*4;
uint32 constant public REG_HI = REG_OFFSET + 0x21*4; uint32 constant public REG_HI = REG_OFFSET + 0x21*4;
uint32 constant public REG_LO = REG_OFFSET + 0x22*4; uint32 constant public REG_LO = REG_OFFSET + 0x22*4;
...@@ -113,11 +114,6 @@ contract MIPS { ...@@ -113,11 +114,6 @@ contract MIPS {
} }
} }
if (opcode == 0 && func == 8) {
// jr
storeAddr = REG_PC;
}
bool shouldBranch = false; bool shouldBranch = false;
uint32 val; uint32 val;
...@@ -165,6 +161,24 @@ contract MIPS { ...@@ -165,6 +161,24 @@ contract MIPS {
} }
} }
// jumps
if (opcode == 0 && func == 8) {
// jr (val is already right)
storeAddr = REG_PC;
}
if (opcode == 0 && func == 9) {
// jalr
stateHash = m.WriteMemory(stateHash, storeAddr, pc+8);
storeAddr = REG_PC;
}
if (opcode == 2 || opcode == 3) {
if (opcode == 3) stateHash = m.WriteMemory(stateHash, REG_LR, pc+8);
val = SE(insn&0x03FFFFFF, 26) << 2;
storeAddr = REG_PC;
}
if (shouldBranch) { if (shouldBranch) {
val = pc + (SE(insn&0xFFFF, 16)<<2); val = pc + (SE(insn&0xFFFF, 16)<<2);
storeAddr = REG_PC; storeAddr = REG_PC;
......
...@@ -143,6 +143,7 @@ func opStaticCall(pc *uint64, interpreter *vm.EVMInterpreter, scope *vm.ScopeCon ...@@ -143,6 +143,7 @@ func opStaticCall(pc *uint64, interpreter *vm.EVMInterpreter, scope *vm.ScopeCon
func runTest(fn string, steps int, interpreter *vm.EVMInterpreter, bytecode []byte) { func runTest(fn string, steps int, interpreter *vm.EVMInterpreter, bytecode []byte) {
ram = make(map[uint64](uint32)) ram = make(map[uint64](uint32))
ram[0xC000007C] = 0xDEAD0000
//fmt.Println("starting", fn) //fmt.Println("starting", fn)
dat, _ := ioutil.ReadFile(fn) dat, _ := ioutil.ReadFile(fn)
for i := 0; i < len(dat); i += 4 { for i := 0; i < len(dat); i += 4 {
......
...@@ -22,7 +22,8 @@ for d in os.listdir("test/"): ...@@ -22,7 +22,8 @@ for d in os.listdir("test/"):
if sec.name == ".test": if sec.name == ".test":
with open("test/bin/"+(d.replace(".asm", ".bin")), "wb") as f: with open("test/bin/"+(d.replace(".asm", ".bin")), "wb") as f:
# jump to 0xdead0000 when done # jump to 0xdead0000 when done
data = b"\x24\x1f\xde\xad\x00\x1f\xfc\x00" + sec.data() #data = b"\x24\x1f\xde\xad\x00\x1f\xfc\x00" + sec.data()
data = sec.data()
for dd in md.disasm(data, 0): for dd in md.disasm(data, 0):
print(dd) print(dd)
f.write(data) f.write(data)
......
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